A semiconductor package, such as a BGA (Ball Grid Array) and a CSP (Chip Scale Package), has a plurality of connecting terminals arranged in a predetermined pattern on its surface. The connecting terminals are formed of spherical solders. In general, the solders are fused when the connecting terminals are electrically connected to an electrode pad such as a motherboard (see Patent Document 1 for example).
Patent Document 1: Japanese Laid-open Patent Publication No. 08-236911